The invention relates to phase locked loops (PLLs), and more particularly, to detecting a distance between two regular patterns in an incoming signal, and according to the detected distance, adjusting the frequency of a phase locked signal in a PLL.
Phase locked loops (PLLs) are a key component in signal processing systems and have a primary function of producing a phase locked signal that has a bit rate and phase matched to an incoming signal. This phase locked signal allows the signal processing system to perform operations such as recovering data from the incoming signal.
In optical storage devices, PLLs play a critical role. Please refer to FIG. 1. FIG. 1 shows a block diagram of a PLL 100 used in an optical storage device according to the related art. The PLL 100 includes a frequency detector (FD) 110, a phase detector (PD) 120, an integrator 130, an adder 140, and a voltage controller oscillator (VCO) 150. As shown in FIG. 1, the PLL 100 receives an incoming signal that is an eight to fourteen modulation (EFM) signal, and the PLL 100 generates an outgoing phase locked signal being an EFM_CLOCK signal. The FD 110 and the PD 120 compare the incoming EFM signal with the outgoing EFM_CLOCK signal, and the VCO 150 is controlled according to the results of these comparisons. In this way, the generated EFM_CLOCK signal has a bit rate and a phase that is matched to the incoming EFM signal.
However, in practical implementations, a compromise exists between a pull-in range and a phase error of the PD 120. In order to obtain an acceptable phase error, the pull-in range of the PD 120 is often limited. This limited pull-in range is a problem because, in some situations, although the FD 110 is unable to detect a frequency deviation between the EFM signal and the EFM_CLOCK signal, the EFM_CLOCK signal may still be outside the pull-in range of the PD 120. Therefore, in these situations, the PD 120 is unable to adjust the phase of the EFM_CLOCK signal to match that of the incoming EFM signal. In order to solve this problem, related art optical storage devices further include some specialized circuits to expand the frequency response of the PLL 100 and use other frequency offset information to drive the VCO 150 and thereby adjust the frequency of the EFM_CLOCK signal to enter the pull-in range of the PD 120.
Using compact discs (CDs) as an example, the EFM signal recorded on CDs has a feature that a legal run length (i.e., the distance between two changes in signal state) is limited to between 3T and 11T, where T refers to the fundamental period of the EFM signal. Any runs less than or equal to 2T, or greater than or equal to 12T are classified as illegal run-lengths. In an optical storage device according to the related art, the PLL 100 uses these illegal run-lengths to obtain additional frequency offset information. For example, using the EFM_CLOCK signal as a reference, if the EFM signal is detected to have run lengths less than 2T, this means the frequency of the EFM_CLOCK signal is less than the bit rate of the EFM signal. Therefore, the PLL 100 increases the frequency of the EFM_CLOCK. Conversely, using the EFM_CLOCK signal as a reference, if the EFM signal is detected to have run lengths greater than 12T, this means the frequency of the EFM_CLOCK signal is greater than the bit rate of the EFM signal. Therefore, the PLL 100 decreases the frequency of the EFM_CLOCK.
There are several problems with using the above described illegal run lengths to generate this extra frequency offset information. Firstly, even if the frequency of the EFM_CLOCK signal is correct, illegal run lengths may still occur in the EFM signal. For example, illegal run lengths can occur if the optical disc read by the optical disc device is scratched or if the burning process used to record information on the optical disc was not perfect. In order to prevent the PLL 100 from mistakenly adjusting the frequency of the EFM_CLOCK signal, protective measures to prevent unnecessary adjustments must be taken.
Secondly, the above described method of using the illegal run lengths is not able to provide the PLL 100 with frequency offset information regarding smaller frequency differences. For example, a normal EFM signal having 11T must be misjudged as having 12T before the EFM signal will be regarded as having an illegal run length. Concerning the accuracy of the frequency control, this resolution is not optimal.
Disclosed in U.S. Pat. No. 5,337,335 is a PLL capable of providing extra frequency offset information. However, the disclosed PLL still uses illegal run lengths in a received EFM signal and therefore includes the above-mentioned two problems.